Checking date: 10/07/2020


Course: 2020/2021

Digital Electronics
(15699)
Study: Bachelor in Industrial Technologies Engineering (256)


Coordinating teacher: GARCIA VALDERAS, MARIO

Department assigned to the subject: Department of Electronic Technology

Type: Electives
ECTS Credits: 6.0 ECTS

Course:
Semester:




Students are expected to have completed
- Electronics Engineering Fundamentals (2nd)
Competences and skills that will be acquired and learning results. Further information on this link
By the end of this subject, students will be able to have: 1. A systematic understanding of the key aspects and concepts of their branch of engineering in digital electronics. 2. Coherent knowledge of their branch of engineering including some at the forefront of the branch in digital electronics. 3. The ability to apply their knowledge and understanding of digital electronics to identify, formulate and solve engineering problems using established methods. 4. The ability to apply their knowledge and understanding to develop and realise designs of digital circuits to meet defined and specified requirements. 5. An understanding of methodologies for the design and description of digital circuits, and an ability to use them. 6. Workshop and laboratory skills. 7. The ability to select and use appropriate equipment, tools and methods, as FPGAs, hardware description languages, simulation and logic synthesis tools for digital circuits. 8. The ability to combine theory and practice to solve problems of digital electronics. 9. An understanding of applicable techniques and methods in digital electronics, and of their limitations.
Description of contents: programme
1. Introduction to design and implementation of digital circuits - Technologies for implementing digital circuits - Hardware description languages - Design flow: simulation and automatic synthesis - Basic concepts of VHDL design 2. Combinational circuits and VHDL description - Logic functions and boolean expressions - Basic logic gates - Multiplexers - Encoders and decoders - Comparators - Aritmethic circuits 3. Sequential circuits and VHDL description - Synchronous and asynchronous flip-flops: synchronous digital design - Registers and counters - Finite state machines - Memories 4. Simulation and synthesis of VHDL decribed digital circuits - VHDL for simulation and synthesis - Testbenches and simulation models - Synthesis. Resource usage and timing. Constraints 5. Digital circuit implementation - Programmable logic devices (FPGA) - Custom integrated circuits (ASIC) - Digital circuit design flow 6. Introduction to digital systems and microprocessors - Structure of a digital system: datapath and control - Typical components in a digital system - Digital System design at the Register-Transfer Level - Basic structure of a microprocessor - Operation of a microprocessor. Instructions 7. Study of a microcontroller - Internal architecture - Memory and register organization - Instruction set - Microcontroller programming. Development environment 8. Peripherals - Types of inputs and outputs - General purpose parallel I/Os - Timers - Methods for communication with peripherals. Interrupts
Learning activities and methodology
- Lectures: 1 session/week (2 h.) - Practice: 1 session/week (2 h.) - Lab. Practice: 4 sessions, 2 h. each - Personal assistance, as scheduled by the professor
Assessment System
  • % end-of-term-examination 45
  • % of continuous assessment (assigments, laboratory, practicals...) 55
Basic Bibliography
  • R. Tokheim. Digital Electronics. McGraw-Hill.
  • . FPGA Manufacturers web pages. Xilinx: www.xilinx.com; Altera: www.altera.com; , ... Various.
  • Bryan Mealy, Fabrizio Tappero. Free Range VHDL. The no-frills guide to writing powerful code for your digital implementations. .. 2013
  • Smith, D.J.. HDL chip design. Doone. 1997
  • T. L. Floyd. Digital Fundamentals. Prentice-Hall.
Additional Bibliography
  • D. D. Gajski. Principios de Diseño Digital. Prentice-Hall.
  • J. F. Wakerly. Digital Design Principles and Practices. Pearson Education.

The course syllabus and the academic weekly planning may change due academic events or other reasons.