Checking date: 30/04/2019


Course: 2019/2020

Integrated circuit design
(14043)
Study: Bachelor in Industrial Electronics and Automation Engineering (223)


Coordinating teacher: ENTRENA ARRONTES, LUIS ALFONSO

Department assigned to the subject: Department of Electronic Technology

Type: Electives
ECTS Credits: 6.0 ECTS

Course:
Semester:




Students are expected to have completed
Digital Electronics
Competences and skills that will be acquired and learning results. Further information on this link
- Capability for high-level design of integrated circuits, understanding and properly using the design methodology - Capability to design, simulate and synthesize digital circuits using Hardware Description Languages (VHDL) in a practical way - Knowledge of high-level design techniques and CAD tools for the design of digital integrated circuits, with particular emphasis on FPGA technology - Capability to integrate Intellectual Property (IP) modules - Capability to evaluate and improve resource usage, performance and power consumption of integrated circuits
Description of contents: programme
1. Introduction to integrated circuits and microelectronics. Design methodology. - Implementation of digital circuits. Integrated circuits and FPGAs. Pros and cons. - The design process of an integrated circuit. Design tools. Design flow. - Hardware Description Languages (HDLs). Pros and cons. 2. Review and extension of VHDL language concepts - Structural design and component instantiation - Packages - Concurrent and sequential statements. Processes. - Objects. Considerations about the use of variables and signals. - Data types and operators. + Scalar types + Composite types: ARRAY and RECORD + Subtypes + Operators and conversion functions + Attributes + Synthesis of data types - VHDL design of combinational circuits + Conditional statements and combinational circuits + Rules for the design of synthesizable combinational circuits - VHDL design of sequential circuits + Synchronous and asynchronous sequential circuits + Rules for the design of synthesizable sequential circuits + Register and flip-flop inference 3. Design validation by simulation - General structure of a test bench - Stimuli generation + Waveform generation using concurrent statements + Waveform generation using sequential statements + Application examples - Output checking. ASSERT statement. - Use of files for input and output 4. Design organization. Generic design. - Design organization - Generic design + Generic parameters + IP blocks + Types of IP blocks. Configuration and use. + Application examples - Iterative statements + Sequential iterative statements. Loops + Concurrent iterative statements - Subroutines. Functions and procedures. 5. FPGAs - Introduction. Types of FPGAs - Internal structure of a FPGA - Basic resources + Logic cells. Operationg modes + Input/Output blocks + Routing resources - Advanced resources + Memory blocks + Arithmetic blocks (DSPs) + Clock management and PLLs + Other resources - Configuration - Examples of FPGA families and devices - Applications 6. Synthesis and design optimization - Digital systems and abstraction levels - Synthesis steps - Design objectives. Estimation of area and delay. - Design optimization techniques at different abstraction levels - Design optimization at the RT level. Serial, parallel and pipelined implementations. - Clock frequency adjustment. Clock generation. - Estimation of power consumption. Low power design. - Examples with tools
Learning activities and methodology
- Lectures: 1 session/week (2 h.) - Practice: 1 session/week (2 h.). Most sessions in Computer Room to develop practical exercises using design tools - Lab. Practice: 4 sessions, 3 h. each. Devoted to implement a practical circuit - Personal assistance, as scheduled by the professor
Assessment System
  • % end-of-term-examination 35
  • % of continuous assessment (assigments, laboratory, practicals...) 65
Basic Bibliography
  • B. Mealy, F. Tappero . "Free Range VHDL. The no-frills guide to writing powerful code for your digital implementations". open-source (http://www.freerangefactory.org/.
  • Ott, Douglas E., Wilderotter, Thomas J.. "A designer¿s guide to VHDL synthesis". Kluwer Academic Publishers. 1994
  • Peter J. Ashenden. The Designer's Guide to VHDL. Morgan Kaufmann. 2008
  • Peter J. Ashenden. Digital Design (VHDL): An Embedded Systems Approach. Elsevier. 2007
  • SMITH, D.J.. HDL chip design. Doone. 1997
Recursos electrónicosElectronic Resources *
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The course syllabus and the academic weekly planning may change due academic events or other reasons.