The objective of this course is for the student to learn about the evolution and internal structure of computer architectures and the main factors that influence the performance of a computer. Among the concepts that will be studied in depth are: (i) the necessary conditions for parallelism, (ii) the design of the instruction repertoire, (iii) the microarchitecture of the processor, and (iv) the main internal parallelism techniques that are applied in current processors to improve their performance (caches in the processor, dynamic instruction scheduling, hop prediction, superscalarity). Finally, superscalar, supersegmented and VLIW machines will be discussed as an evolution of processors searching for a higher degree of instruction-level parallelism.
In terms of capabilities, these can be classified into two groups, one of the specific capabilities and the other of more generic abilities or skills.
In terms of specific capabilities, at the end of the course, the student will be able to:
- Understand the operation of a basic segmented processor.
- Analyse the dependencies existing in a particular code and their effect on processing.
- Understand the operation and limitations of existing processors and lines of improvement.
- Interpret performance data obtained from the execution of a code on a machine.
In terms of general capabilities or skills, the course will focus on the following:
- Overview of the complex problem of instruction execution on a segmented processor.
Ability to design and carry out code optimisation experiments and organise, analyse, and interpret the results. This ability will be worked on, especially in the laboratory sessions and the resolution and discussion of case studies.
- Ability to work in a team in a cooperative, critical and respectful way with the solutions proposed by others.